Design Summer Intern

Website Skyworks

You will work with a team developing custom digital IP in sub-45nm mixed-signal CMOS SOCs.  This will include simulation-based testing, data collection and reporting.  Familiarity with Verilog and System Verilog, Python and FPGA systems will be important to your success, as will experience with common lab equipment such as oscilloscopes, power supplies and digital logic analyzers.

We will not consider students who have already graduated.  Student must be available from June – August 2022.
Skyworks is an Equal Opportunity Employer.  All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law.

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